ASIC Verification: Gray Code Counter Implementation

Wednesday, July 23, 2008

Gray Code Counter Implementation

A Gray code is an encoding of numbers so that adjacent numbers have a single digit differing by 1. The term Gray code is often used to refer to a Binary Reflected Gray Code. We can implement a gray code counter in a different ways. Consider the following table carefully.

B : 000, 001, 010, 011, 100, 101, 110, 111
G: 000, 001, 011, 010, 110, 111, 101, 100

To convert a binary number d1,d2,..,d(n-1),dn to its corresponding Binary Reflected Gray Code, start at the right with the digit dn (the LSB). If the d(n-1) is 1, replace dn by (1-dn); otherwise, leave it unchanged. Then proceed to d(n-1). Continue up to the first d1, which is kept the same. The resulting number g1,g2,..,g(n-1),gn is the Reflected Binary Gray Code.

The most common Gray code is where the lower half of the sequence is exactly the mirror image of first half with only the MSB inverted. We illustrate the 3-bit binary Gray code as an example.

Binary to gray code can be achieved by

gray[2] = binary[2];

gray[1] = binary[2] ^ binary[1];

gray[0] = binary[1] ^ binary[0];

A simple verilog code to implement this function is given by

assign gray = (binary>> 1) ^ binary; // Right shift by 1 and EX-OR with binary.

 module gray_cntr (  

// I/O Declarations

input clock_in, rst_n, enable_in;
output [ 2:0] cnt_out;
wire [2:0] cnt_out;
reg [2:0] cnt;

always @ (posedge clock_in or negedge rst_n)
if (!rst_n)
<= 1'b0;
else if (enable_in)
<= cnt + 1'b1;

assign cnt_out = { cnt[2], (^cnt[2:1]), (^cnt[1:0]) };



සඳුන් රත්නායක said...

this was very useful to me....

Deshdaaz said...

You need not explicitly declare cnt_out as wire if you already declared it as an output...All Verilog input/output/inout are implicitly declared as wires...

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